An electronic apparatus such as a digital still camera generally includes data processing parts different from one another and a data processing memory. Each of the processing parts reads desired data from the memory and writes the processed data to the memory. Since the memory is accessed asynchronously for the processes, access requests from the processing parts to the memory may conflict. To resolve the conflict, an arbitration device operable to arbitrate the access requests from the processing parts to the memory may be provided between the processing parts and the memory.
As illustrated in FIG. 1, an arbitration device 101 is coupled between processing parts, which are not depicted, and a memory 102. The arbitration device 101 includes a first arbitration function part 111, a second arbitration function part 112, and a bus controller 121.
Each of selection parts 111a and 111b of the first arbitration function part 111 sequentially selects an input terminal after every given period to output a signal input to the selected input terminal. Similarly, each of selection parts 112a and 112b sequentially selects an input terminal after every given period to output a signal input to the selected input terminal. When the processing parts access the memory 102 for desired processes, request signals S101 to S107 are output from the processing parts to be input to the selection parts 111a, 111b, 112a, and 112b. The bus controller 121 provides the requesting processing parts with the right to use a shared bus coupled to the memory 102 in response to the request signals output from the first arbitration function part 111 and the second arbitration function part 112.
Each of the first arbitration function part 111 and the second arbitration function part 112 outputs a request signal selected from the request signals S101 to S107 in accordance with the priorities depending on the configurations, for example, the coupling states of the selection parts 111a, 111b, 112a, and 112b. For example, the first arbitration function part 111 processes the access requests from two processing parts coupled to the first selection part 111a in accordance with a first priority and processes the access requests from two other processing parts coupled to the second selection part 111b in accordance with a second priority lower than the first priority.
By the way, in the electronic apparatus, processing parts that operate or obtain higher priorities may change depending on a state of the process being performed. For example, in a typical digital still camera, the processing parts that operate when image data are recorded and the processing parts that operate when the recorded image data are processed are different. However, in the arbitration device 101, each of the requests from the processing parts is validated for a period of time depending on the configuration of the arbitration function part 111 or 112. For example, the first selection part 111a processes the input request signals S101 and 5102 in accordance with substantially the same priority. However, the time taken for the selection of the input terminal may remain unchanged even when the other processing part does not operate. In other words, resource is consumed also for the inactive processing part and as a result, the limited resource may not be used efficiently.
To address the problems, the processing parts to which the arbitration function parts 111 and 112 are coupled are changed, that is, the allocation of the terminals to which the request signals are input is changed. For example, in the data processing system discussed in Japanese Patent Application Laid-Open Publication No. 2003-271545, a selection part of signals for requesting the right to use a bus allocates request signals provided by modules to one of intra-group arbiters in accordance with group values stored in a group setting register in a group setting part. Each of the intra-group arbiters includes a round-robin table and outputs one of the request signals input in accordance with the arbitration contents of the table. An inter-group arbiter arbitrates the request signals output from the intra-group arbiters in accordance with the contents for performing fixed priority arbitration, which are stored in the internal table to output the arbitrated request signals. In Japanese Patent Application Laid-Open Publication No. 2003-271545, a data processing system that may set either the fixed priority arbitration or the round-robin arbitration for the inter-group arbiter is also discussed.
However, in a typical data processing system, high-priority requests may be mainly selected and low-priority requests may be hardly accepted when the inter-group arbiter is set to perform the fixed priority arbitration. Alternatively, the inter-group requests may be equalized and the high-priority requests may be less likely to be accepted when the inter-group arbiter is set to perform the round-robin arbitration in the typical data processing system.